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to our customers, old company name in catalogs and other documents on april 1 st , 2010, nec electronics corporation merged with renesas technology corporation, and renesas electronics corporation took over all the business of both companies. therefore, although the old company name remains in this document, it is a valid renesas electronics document. we appreciate your understanding. renesas electronics website: http://www.renesas.com april 1 st , 2010 renesas electronics corporation issued by: renesas electronics corporation (http://www.renesas.com) send any inquiries to http://www.renesas.com/inquiry.
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document no. u15870ee1v1ds00 data published: april 2005 v850es/gb1 tm venus 32-/16-bit single-chip microc ontroller with can interface the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. ? nec corporation 2005 data sheet mos integrated circuit pd703223, pd703224 pd703225, pd703226 description the v850es/gb1 venus single chip microcontroller is a member of nec's v850 32-bit risc family, which match the performance gains attainable with risc-based controllers to the needs of embedded control applications. the v850 cpu offers easy pipeline handling and programming, resulting in com- pact code size comparable to 16-bit cisc cpus. the v850es/gb1 offers an excellent combination of general purpose peripheral functions, like serial communication interfaces (uart, clocked si), timers and measurement inputs (a/d converter), with dedicated can network support. the device offers power-saving modes to manage the power con- sumption effectively under varying conditions. thus equipped, the v850es/gb1 venus is ideally suited for automotive applications. ? 32-bit risc cpu with harvard architecture internal rom: 128 kb internal ram: 6 kb can interface: 1 channel (dcan) serial interfaces: 4 channels - 3-wire mode: 2 channels - uart mode: 2 channels (lin compatible) timers: 7 channels - 16-bit dual time-base timer: 1 channel - 16-bit capture/compare timer: 1 channel - 8-bit multi purpose timer: 3 channels - watch timer: 1 channel - watchdog timer: 1 channel 10-bit resolution a/d converter: 12 channels i/o lines: 84 power supply voltage range: +4.0 v to +5.5 v frequency range: - main: 8 mhz to 16 mhz - crystal sub clock: 32.768 khz (pd703224) - rc sub clock: 40 to 100 khz (pd703226) built-in low power saving mode: - halt, watch, stop temperature range: - -40c to +85c - pd703223(a), pd703224(a), - pd703225(a), pd703226(a) - package: - 100 lqfp, 0.5 mm pin-pitch (14 14 mm) ordering information device part number package mask rom ram sub clock v850es/gb1 pd703223gc(a)-8eu lqfp100 14 14 mm 96 kb 4 kb crystal pd703224gc(a)-8eu 128 kb 6 kb pd703225gc(a)-8eu 96 kb 4 kb rc pd703226gc(a)-8eu 128 kb 6 kb features
2 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 internal block diagram notes: 1. pd703223, pd703224: xt1,xt2, pd703225, pd703226: cl1,cl2 2. the can macro of this device fulfils the requirements according iso 11898. additionally the can macro was tested according to the test procedures required by iso 16845. the can macro successfully passed all test patterns. beyond these test patterns, other tests like robustness tests and processor interface tests as recommended by c&s/fh wolfenbuettel have successfully been issued. mask/ rom ram pc barrel shifter system registers general registers hardware multiplier a l u bus control unit internal peripheral bus b cpu core av ref kr0-kr7 power supply av ss /av dd 16-bit timer tmg0 interrupt controller nmi intp0 to intp8 tig00 to tig05 tog01 to tog04 8-bit timer tm50 16-bit timer tmc0 tic00, tic01 toc0 ti50 to50 8-bit timer tm52 8-bit timer tm51 ti51 to51 ti52 to52 dcan0 crxd0 ctxd0 uart61 uart60 rxd60 txd60 rxd61 txd61 csi00 si00 so00 sck00 csi01 si01 so01 sck01 ani0-ani11 watchdog timer watch timer key return x1 x2 reset clkout oscillator and clock generator system control regc0/regc1 v ss51 v ss30 - v ss31 ic ports 10-bit adc 12 channels p00-p06 pct0,1,4,6 pdh0-pdh5 pcm0-pcm3 pdl0-pdl15 pcs0-pcs1 p70-p711 p50-p57 p40-p47 p30-p34 p20-p25 p10-p15 v dd50 - v dd51 note 1 xt1/cl1 xt2/cl2 note 1 note 2
3 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 pin identification ani0 to ani11 analog input reset reset input av dd /av ref analog power supply rxd60, rxd61 uart receive data av ss analog ground sck00 , sck01 synchronous interface clock clkout processor clock output si00, si01 synchronous interface input crxd0 can receive data so00, so 01 synchronous interface output ctxd0 can transmit data ti50, ti51, ti52 timer 5 count input intp0 to intp8 external interrupt input tic00, tic01 timer c0 capture input nmi non-maskable interrupt input tig00 to tig05 timer g0 capture input p00 to p06 port 0 to50, to51, to52 timer 5 compare output p10 to p15 port 1 toc0 timer c0 compare output p20 to p25 port 2 tog01 to tog04 timer g0 compare output p30 to p34 port 3 txd60, txd61 uart transmit data p40 to p47 port 4 x1, x2 main system clock p50 to p57 port 5 xt1, xt2 (cl1,cl2) crystal (rc) sub clock p70 to p711 port 7 regc0, regc1 3.3 v regulator output pcs0 to pcs1 port cs v ss30 , v ss31 ground pct0, pct1, pct4, pct6 port ct v ss51 ground for i/o buffers pdh0 to pdh5 port dh v dd50 digital power supply pcm0 to pcm3 port cm v dd51 power supply for i/o buffers pdl0 to pdl15 port dl ic internally connected kr0 to kr7 key return inputs
4 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 pin configuration 100-pin plastic lqfp (fine pitch) (14 mm u 14 mm) (top view) note: pd703223, pd703224: xt1,xt2, pd703225, pd703226: cl1,cl2 av dd /av ref av ss p00/intp0 p01/intp1 p02/intp2 p03/intp3 p04/intp4 p05/intp5 v dd50 regc0 v ss30 x2 reset cl1/xt1 cl2/xt2 p06/intp6 p11/so00 p13/rxd60/intp7 p70/ani0 p71/ani1 p72/ani2 p76/ani6 p77/ani7 p78/ani8 p79/ani9 p710/ani10 p711/ani11 p34/tic01 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 46 47 48 49 50 v850/gb1 "venus" 52 51 77 76 x1 note nmi p10/si00 p12/sck00 p14/txd60 p15 p40/kr0 p41/kr1/tig00 p42/kr2/tig01/tog01 p43/kr3/tig02/tog02 p45/kr5/tig04/tog04 p46/kr6/tig05 p47/kr7 p50 p51 p52 p53 p54/ctxd0 p55/crxd0 p56 p57 pcs0 pcs1 pdl0 pdl1 pdl2 pdl3 pdl4 pdl5 pdl6 pdl7 p44/kr4/tig03/tog03 p73/ani3 p74/ani4 p75/ani5 p33/tic00/toc0 p32/ti52/to52 p31/ti51/to51 p30/ti50/to50 p25 p24/sck01 p23/so01 p22/si01 p21/txd61 p20/rxd61/intp8 pct6 pct4 pct1 pct0 pdh5 pdh4 pdh3 pdh2 pdh1 pdh0 pcm3 regc1 v ss31 pcm2 pcm1/clkout pcm0 v ss51 v dd51 pdl15 pdl14 ic pdl13 pdl12 pdl11 pdl10 pdl9 pdl8 note
5 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 table of contents 1. pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.1 pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.2 i/o circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 1.3 port pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 1.4 non-port pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2. electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.2 general characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.2.1 i/o capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.2.2 main oscillator characteri stics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.2.3 sub oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2.2.4 recommended oscilla tor circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2.3 dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2.3.1 supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2.3.2 data retention characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 2.4 ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.4.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.4.2 ac test load condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.4.3 basic operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.4.4 reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 2.5 peripheral function characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 2.5.1 key return timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 2.5.2 interrupt timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 2.5.3 timer g0 / timer c0 /timer 5n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2.5.4 csi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 2.5.5 uart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 2.5.6 dcan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 2.5.7 a/d converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 2.5.8 voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 3. package drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4. recommended soldering conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 list of figures figure 1-1: input / output circuits............................................................................................. ..... 13 figure 2-1: main oscillator recommendations........ ...................................................................... 21 figure 2-2: sub oscillator recommendations ............ ................................................................... 21 figure 2-3: rc oscillator connection ............................................................................................ 22 figure 2-4: data retention timing............................................................................................... .. 26 figure 2-5: ac test input waveform, ac test load condition ..................................................... 27 figure 2-6: ac test load condition .............................................................................................. 27 figure 2-7: reset timing............................................................................................................. 28 figure 2-8: key return timing................................................................................................... .... 29 figure 2-9: interrupt timing .................................................................................................... ....... 29 figure 2-10: timer g0 characteristics........................................................................................... .. 30 figure 2-11: timer c0 characteristics ........................................................................................... .. 30 figure 2-12: timer 5n characteristics........................................................................................... ... 30 figure 2-13: csi slave mode characteristics.................................................................................. 32 figure 3-1: package drawing ..................................................................................................... ... 34
7 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 list of tables table 1-1: pin functions........................................................................................................ ............ 9 table 1-2: mode of port pin after reset......................................................................................... .14 table 1-3: non-port pin recommended connections..................................................................... 17 table 2-1: absolute maximum ratings............................................................................................ 1 8 table 2-2: i/o capacitance...................................................................................................... ........ 19 table 2-3: main oscillator characteristics ........ .............................................................................. .19 table 2-4: crystal sub oscillator characteristics ............................................................................ 20 table 2-5: rc sub oscillator characteristics .................................................................................. 20 table 2-6: dc characteristics................................................................................................... ....... 23 table 2-7: power supply current................................................................................................. ..... 24 table 2-8: power supply current ................................................................................................. ... 25 table 2-9: data retention characteristics....................................................................................... 26 table 2-10: reset timing ........................................................................................................ .......... 27 table 2-11: reset timing ........................................................................................................ .......... 28 table 2-12: key return timing................................................................................................... ....... 29 table 2-13: interrupt timing .................................................................................................... .......... 29 table 2-14: timer g0 / timer c0 / timer 5n characteristics............................................................. 30 table 2-15: csi master mode characteristics................................................................................... 31 table 2-16: csi slave mode characteristics..................................................................................... 3 1 table 2-17: uart characteristics ................................................................................................ ..... 32 table 2-18: dcan characteristics................................................................................................ ..... 32 table 2-19: a/d converter characteristics ....................................................................................... .33 table 2-20: voltage regulator ................................................................................................... ......... 33 table 4-1: soldering conditions ................................................................................................. ..... 35
8 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226
9 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 1. pin functions 1.1 pin functions table 1-1: pin functions (1/4) pin function i/o driver ty p e software pull up no. name default alternate 1 av dd /av ref analog supply - - - - 2 av ss analog ground - - - - 3 p00/intp0 port 0: 7-bit input/output port external interrupt input intp0 i/o 5-w x 4 p01/intp1 external interrupt input intp1 5 p02/intp2 external interrupt input intp2 6 p03/intp3 external interrupt input intp3 7 p04/intp4 external interrupt input intp4 8 p05/intp5 external interrupt input intp5 9 v dd50 digital supply - - - - 10 regc0 internal voltage regulator output - - - - 11 v ss30 digital ground - - - - 12 x1 main oscillator input - i 16 - 13 x2 main oscillator output - o 16 - 14 reset reset input - i 2 - 15 cl1/xt1 sub oscillator input - i 16 - 16 cl2/xt2 sub oscillator output - o 16 - 17 nmi non-maskable interrupt input - i 2 - 18 p06/intp6 port 0: 7-bit input/output po rt external interrupt input intp6 i/o 5-w x 19 p10/si00 port 1: 6-bit input/output port 3-wire serial link 0 data input i/o 5-w x 20 p11/so00 3-wire serial link 0 data output i/o 5-a x 21 p12/sck00 3-wire serial link 0 clock i/o i/o 5-w x 22 p13/rxd60/ intp7 uart0 data input external interrupt input intp7 i/o 5-w x 23 p14/txd60 uart0 data output i/o 5-a x 24 p15 - i/o 5-a x
10 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 25 p40/kr0 port 4: 8-bit input/output port key return input 0 i/o 5-w x 26 p41/kr1/ tig00 key return input 1 timerg0 capture trigger 0 timerg0 compare output 0 27 p42/kr2/ tig01/tog01 key return input 2 timerg0 capture trigger 1 timerg0 compare output 1 28 p43/kr3/ tig02/tog02 key return input 3 timerg0 capture trigger 2 timerg0 compare output 2 29 p44/kr4/ tig03/tog03 key return input 4 timerg0 capture trigger 3 timerg0 compare output 3 30 p45/kr5/ tig04/tog04 key return input 5 timerg0 capture trigger 4 timerg0 compare output 4 31 p46/kr6/ tig05 key return input 6 timerg0 capture trigger 5 32 p47/kr7 key return input 7 33 p50 port 5: 8-bit input/output port - i/o 5-a x 34 p51 - 5-a 35 p52 - 5-a 36 p53 - 5-a 37 p54/ctxd0 dcan0 transmit data 5-a 38 p55/crxd0 dcan0 receive data 5-w 39 p56 - 5-a 40 p57 - 5-a 41 pcs0 port cs: 2-bit input/output port - i/o 5-k - 42 pcs1 - 43 pdl0 port dl: 16-bit input/output port - i/o 5-k - 44 pdl1 - 45 pdl2 - 46 pdl3 - 47 pdl4 - 48 pdl5 - 49 pdl6 - 50 pdl7 - 51 pdl8 - 52 pdl9 - 53 pdl10 - 54 pdl11 - 55 pdl12 - 56 pdl13 - 57 ic internally connected - - - - table 1-1: pin functions (2/4) pin function i/o driver ty p e software pull up no. name default alternate
11 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 58 pdl14 port dl: 16-bit input/output port - i/o 5-k - 59 pdl15 - 60 v dd51 power supply i/o buffers - - - - 61 v ss51 i/o buffers ground - - - - 62 pcm0 port cm: 4-bit input/output port - i/o 5-k - 63 pcm1/ clkout cpu clock output 64 pcm2 - 65 v ss31 digital ground - - - - 66 regc1 internal voltage regulator output - - - - 67 pcm3 port cm: 4-bit input/output port - i/o 5-k - 68 pdh0 port dh: 6-bit input/output port - 69 pdh1 - 70 pdh2 - 71 pdh3 - 72 pdh4 - 73 pdh5 - 74 pct0 port ct: 4-bit input/output port - i/o 5-k - 75 pct1 - 76 pct4 - 77 pct6 - 78 p20/rxd61/ intp8 port 2: 6-bit input/output port uart1 data input external interrupt input intp8 i/o 5-w x 79 p21/txd61 uart1 data output 5-a 80 p22/si01 3-wire serial link 1 data input 5-w 81 p23/so01 3-wire serial link 1 data output 5-a 82 p24/sck01 3-wire serial link 1 clock i/o 5-w 83 p25 - 5-a 84 p30/ti50/ to50 port 3: 5-bit input/output port 8-bit timer 50 external clock input / pwm output i/o 5-w x 85 p31/ti51/ to51 8-bit timer 51 external clock input / pwm output 86 p32/ti52/ to52 8-bit timer 52 external clock input / pwm output 87 p33/tic00/ toc0 16 bits timerc0 capture trigger 0 / compare output 0 88 p34/tic01 16 bits timerc0 capture trigger 1 table 1-1: pin functions (3/4) pin function i/o driver ty p e software pull up no. name default alternate
12 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 caution: regc0 and regc1 have to be connected to each other and the capacitors on regc0 and regc1 have to be attached as tight as possible to the pins 89 p711/ani11 port 7: 12-bit input port ani11 i9-c 90 p710/ani10 ani12 91 p79/ani9 ani9 92 p78/ani8 ani8 93 p77/ani7 ani7 94 p76/ani6 ani7 95 p75/ani5 ani6 96 p74/ani4 ani5 97 p73/ani3 ani3 98 p72/ani2 ani2 99 p71/ani1 ani1 100 p70/ani0 ani0 table 1-1: pin functions (4/4) pin function i/o driver ty p e software pull up no. name default alternate
13 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 1.2 i/o circuits figure 1-1: input / output circuits type 2 type 5-a type 5-k type 5-w in pullup enable data output disable v p-ch n-ch p-ch in/out dd v dd input enable data output disable v p-ch n-ch in/out dd v ss input enable pullup enable data output disable v p-ch n-ch p-ch in/out dd v dd input enable type 9-c type 16 p-ch n-ch input enable + - v ref in comparator (threshold voltage) av ss p-ch feedback cut-off input output
14 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 1.3 port pin table 1-2: mode of port pin after reset (1/3) port name pin name pin function after reset single chip mode if not used pnmi nmi nmi independently connect to v ss51 or v dd51 via resistor p0 p00/intp0 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open p01/intp1 p02/intp2 p03/intp3 p04/inpt4 p05/inpt5 p06/inpt6 p1 p10/si00 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open p11/so00 p12/sck00 p13/intp7/rxd60 p14/txd60 p15 p2 p20/intp8/rxd61 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open p21/txd61 p22/sio01 p23/so01 p24/sck01 p25 p3 p30/ti50/to50 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open p31/ti51/to51 p32/ti52/to52 p33/tic00/toc0 p34/tic01 p4 p40/kr0 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open p41/kr1/tig00 p42/kr2/tig01/tog01 p43/kr3/tig02/tog02 p44/kr4/tig03/tog03 p45/kr5/tig04/tog04 p46/kr6/tig05 p47/kr7
15 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 p5 p50 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open p51 p52 p53 p54/ctxd0 p55/crcd0 p56 p57 p7 p70/ani0 port mode (input mode) independently connect to av ss or av dd via resistor p71/ani1 p72/ani2 p73/ani3 p74/ani4 p75/ani5 p76/ani6 p77/ani7 p78/ani8 p79/ani9 p710/ani10 p711/ani11 pcs pcs0 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open pcs1 pct pc0 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open pc1 pc4 pc6 pdh pdh0 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open pdh1 pdh2 pdh3 pdh4 pdh5 pcm pcm0 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open pcm1 pcm2 pcm3 table 1-2: mode of port pin after reset (2/3) port name pin name pin function after reset single chip mode if not used
16 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 pdl pdl0 port mode (input mode) input: independently connect to v ss51 or v dd51 via resistor output: leave open pdl1 pdl2 pdl3 pdl4 pdl5 pdl6 pdl7 pdl8 pdl9 pdl10 pdl11 pdl12 pdl13 pdl14 pdl15 table 1-2: mode of port pin after reset (3/3) port name pin name pin function after reset single chip mode if not used
17 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 1.4 table 1-3: non-port pin recommended connections non-port pin caution: regc0 and regc1 have to be connected to each other and the capacitors on regc0 and regc1 have to be attached as tight as possible to the pins pin number pin name connection for normal operation if not used 1 av dd analog power supply connect to v dd51 2 av ss analog ground connect to v ss51 9 v dd50 5.0 v power supply - 10 regc0 connect an 1 f capacitor between this pin and ground - 11 v ss30 digital ground - 12 x1 refer to 2.2.4 for recommended circuit - 13 x2 - 14 reset reset input - 15 xt1 refer to 2.2.4 for recommended circuit connect to v ss30 or v ss31 via resistor 16 xt2 leave open 57 ic connect to ground - 60 v dd51 i/o buffers power supply 61 v ss51 i/o buffers ground 65 v ss31 digital ground 66 regc1 connect an 1 f capacitor between this pin and ground
18 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 2. electrical specifications 2.1 absolute maximum ratings t a = 25c, v ss51 = 0 v remarks: 1. x = 0, 1 2. the characteristics of the dual-functions pins are the same as those of the port pins unless otherwise specified. note: all ports pins are p0, p1, p2, p3, p4, p5, p7, pcs, pct, pdh, pcm, pdl. cautions: 1. avoid direct connections among the ic device output (or i/o) pins and between v dd or v cc and gnd. 2. product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the abso- lute maximum ratings are not exceeded. the ratings and conditions indicated for dc characteristics and ac characteristics represent the quality assurance range during normal operation. table 2-1: absolute maximum ratings parameter symbol conditions ratings unit supply voltage v dd50, v dd51 v dd50 = v dd51 -0.5 ~ +6.0 v av dd av dd d v dd5x + 0.5 v -0.5 ~ +6.0 v ss30, v ss31 v ss30 = v ss31 -0.5 ~ +0.5 av ss -0.5 ~ +0.5 input voltage v i v i < v dd51 + 0.5 v all port pins note 1 , nmi, reset -0.5 ~ +6.0 analog input voltage v ian v ian < av dd + 0.5 v -0.5 ~ +6.0 low level output current note 1 i ol all port pins note 1 1 pin 4.0 ma all pins 50 high level output current note 1 i oh all port pins note 1 1 pin -4.0 all pins -50 output voltage v o1 v o1 < v dd51 + 0.5 v -0.5 ~ +6.0 v operating temperature t a -40 ~ +85 c storage temperature t stga -65 ~ +150
19 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 2.2 general characteristics 2.2.1 i/o capacitance t a = 25c, v dd50 = v dd51 = v ss51 = v ss30 = v ss31 = av dd = av ss = 0 v 2.2.2 main oscillator characteristics t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss30 = v ss31 = v ss51 = av ss = 0 v notes: 1. indicates only the oscillation circuit characte ristics. refer to ?ac characteristic? for cpu operation clock. 2. time, which is required for internal stabilization. the osts register has to be set to a time, which is longer than above defined values, before entering either watch or stop mode. 3. after v dd5x reaches oscillator voltage range min. 4.0 v 4. start-up time of external crystal or resonator is not included and must be checked with res- onator supplier. 5. typical value differs depending on settings of the oscillation stabiliz ation time selection register (osts) 6. to release watch mode, minimum 10-clock cycles time is required. if sub clock is used to recover from watch mode, minimum time for watch mode release is determined by this 10-clock cycles. table 2-2: i/o capacitance parameter symbol test conditions min. typ. max. unit input capacitance c i f c = 1 mhz unmeasured pins returned to 0 v 15 pf input/output capacitance c io 15 pf output capacitance c o 15 pf table 2-3: main oscillator characteristics parameter symbol conditions min. typ. max. unit main oscillator frequency f xx note 1 816mhz oscillation stabilization time note 2, 3 t ost after reset note 4 2 17 /f xx ms after stop mode note 4 2 note 5 ms after watch mode note 6 100 note 5 s
20 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 2.2.3 sub oscillator characteristics (1) crystal sub oscillator t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss30 = v ss31 = v ss51 = av ss = 0 v note: start-up time of external crystal must be checked with resonator supplier. (2) rc sub oscillator t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss30 = v ss31 = v ss51 = av ss = 0 v) table 2-4: crystal sub oscillator characteristics parameter symbol test conditions min. typ. max. unit sub oscillator frequency f xt 32.768 khz oscillation stabilization time t sost 10 note s table 2-5: rc sub oscillator characteristics parameter symbol test conditions min. typ. max. unit sub oscillator frequency f xt r = 500 k : c = 33 pf 40 100 khz
21 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 2.2.4 recommended oscillator circuit (1) recommended main system clock oscillator circuit (a) ceramic resonator or crystal resonator connection figure 2-1: main oscillator recommendations remark: values of capacitors c1?, c2? and r1? depend on used resonator and must be specified in cooperation with the manufacturer. (2) recommended subsystem clock oscillator circuit (a) ceramic resonator or crystal resonator connection: pd703223 (a), pd703224 (a) figure 2-2: sub oscillator recommendations remark: values of capacitors c1?, c2? and resistors r?1 depend on used resonator and must be specified in cooperation with the manufacturer. x2 x1 c2' c1' r1' q u xt2 xt1 c2' c1' q u r'1
22 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 (b) rc oscillator connection: pd703225 (a), pd703226 (a) figure 2-3: rc oscillator connection cautions: 1. external clock to main clock or subsystem clock oscillator input is prohibited. 2. when using the main system clock or the sub system clock oscillator, wire as fol- lows in the area enclosed by the broken lines in the above figures to avoid an adverse effect from wiring capacitance. keep the wiring length as short as possible. do not cross the wiring with the other signal lines. do not route the wiring near a signal line through which a high fluctuating current flows. always make the ground point of the oscillator capacitor the same potential as v ss . do not ground the capacitor to a ground pattern through which a high cur- rent flows. do not fetch signals from the oscillator. cl1 cl2 c r
23 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 2.3 dc characteristics t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss30 = v ss31 = v ss51 = av ss = 0 v note: can only be used as digital input port when av dd = v dd5x table 2-6: dc characteristics parameter symbol test conditions min. typ. max. unit high level input voltage p11, p14-p15, p21, p23, p25, p50-p54, p56-p57 v ih1 0.7 v dd51 v dd51 v p00-p06, p10, p12-p13, p20, p22, p24, p30-p34, pdl0-pdl15, pcm0-pcm3, pdh0-pdh5, pct0, pct1, pct4, pct6, nmi v ih2 0.8 v dd51 v dd51 p70-p711 note v ih3 0.7 av dd av dd reset v ih4 0.8 v dd51 v dd51 low level input voltage p11, p14-p15, p21, p23, p25, p50-p54, p56-p57 v il1 v ss51 0.3 v dd51 p00-p06, p10, p12-p13, p20, p22, p24, p30-p34, pdl0-pdl15, pcm0-pcm3, pdh0-pdh5, pct0, pct1, pct4, pct6, nmi v il2 v ss51 0.2 v dd51 p70-p711 note v il3 0 0.3 av dd reset v il4 v ss51 0.2 v dd51 high level output voltage v oh1 i oh = -2.0 ma v dd51 - 1.0 v v dd51 i oh = -100 a v dd51 - 0.5 v v dd51 low level output voltage v ol1 i ol = 2.0 ma 0.4 i ol = 100 a 0.2 input leakage current, high except for x1, x2, xt1, xt2 i lih1 v i = v dd51 0.3 3 a input leakage current, low except for x1, x2, xt1, xt2 i lil1 v i = 0 v -0.3 -3 software pull-up resistor p0, p1, p2, p3, p4, p5 r1 10 30 100 k :
24 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 2.3.1 supply current (1) pd703223 (a), pd703224 (a) t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v f xx = 16 mhz, f xt = 32.768 khz notes: 1. av dd /av ref current, port current (including a current flowing through the on-chip pull-up resistors) are not included. 2. cpu operating at maximum frequency (pcc = 0x00h), peripheral functions operating at maximum frequency (excepted dcan0). 3. cpu stopped, peripheral functions operating at maximum frequency (excepted dcan0). 4. cpu stopped, all peripheral functions stopped (watch timer and watchdog timer operating on subclock). 5. subclock not connected. 6. cpu operating on subclock, main system clock oscillator stopped, all peripheral functions stopped, (watch timer and watchdog timer operating on subclock). 7. cpu stopped, main system cloc k oscillator stopped, all periphe ral functions stopped (watch timer and watchdog timer operating on subclock). 8. cpu stopped, main system cloc k oscillator stopped, all periphe ral functions stopped (watch timer and watchdog timer operating on subclock). table 2-7: power supply current parameter symbol test conditions min. typ. max. unit power supply current note 1 pd703223(a) pd703224(a) i dd1 operating note 2 30 45 ma i dd2 halt mode note 3 20 30 i dd3 watch mode note 4 1.5 2.3 i dd4 stop mode note 5 50 120 a i dd5 sub operating note 6 125 250 i dd6 sub halt mode note 7 75 150 i dd7 sub watch mode note 8 75 150
25 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 (2) pd703225 (a), pd703226 (a) t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v f xx = 16 mhz, f xt = 32 khz notes: 1. av dd /av ref current, port current (including a current flowing through the on-chip pull-up resistors) are not included. 2. cpu operating at maximum frequency (pcc = 0x00h), peripheral functions operating at maximum frequency (excepted dcan0). 3. cpu stopped, peripheral functions operating at maximum frequency (excepted dcan0). 4. cpu stopped, all peripheral functions stopped (watch timer and watchdog timer operating on subclock). 5. subclock not connected. 6. cpu operating on subclock, ma in system clock oscillator stopp ed, all peripheral functions stopped, (watch timer and watchdog timer operating on subclock). 7. cpu stopped, main system clock oscillator stopped, all peripher al functions stopped (watch timer and watchdog timer operating on subclock). 8. cpu stopped, main system clock oscillator stopped, all peripher al functions stopped (watch timer and watchdog timer operating on subclock). table 2-8: power supply current parameter symbol test conditions min. typ. max. unit power supply current note 1 pd703225(a) pd703226(a) i dd1 operating note 2 30 45 ma i dd2 halt mode note 3 20 30 i dd3 watch mode note 4 1.5 2.3 i dd4 stop mode note 5 50 120 a i dd5 sub operating note 6 140 275 i dd6 sub halt mode note 7 90 175 i dd7 sub watch mode note 8 90 175
26 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 2.3.2 data retention characteristics t a = -40 ~ +85c: note: subclock stopped figure 2-4: data retention timing table 2-9: data retention characteristics parameter symbol test conditions min. typ. max. unit data retention voltage v dddr stop mode note (no functions operating) 3.0 5.5 v supply voltage rise time t rvd 200 s supply voltage fall time t fvd 200 s supply voltage hold time t hvd 0ms stop release signal input time t drel 0ns data retention high-level input voltage v ihdr all input ports 0.9v dddr v dddr v data retention high-level input voltage v ildr all input ports 0 0.1v dddr v setting stop mode v dd reset (input) stop mode release interrupt (nmi, etc.) (released by falling edge) stop mode release interrupt (nmi, etc.) (released by rising edge) v dddr v ihdr v ihdr t fvd t rvd t hvd t drel v ildr
27 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 2.4 ac characteristics 2.4.1 general t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v output pin load capacitance: c l = 50 pf figure 2-5: ac test input waveform, ac test load condition 2.4.2 ac test load condition figure 2-6: ac test load condition 2.4.3 basic operation t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v table 2-10: reset timing parameter symbol test conditions min. max. unit cpu operating clock f cpu 16 mhz test points 0.8 v dd5x 0.2 v dd5x v dd5x 0 v dut load on test c l = 50 pf
28 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 2.4.4 reset t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v figure 2-7: reset timing table 2-11: reset timing parameter symbol test conditions min. max. unit reset low-level width t wrsl 500 ns t wrsl reset
29 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 2.5 peripheral function characteristics 2.5.1 key return timing t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v note: n = 0 to 7 figure 2-8: key return timing 2.5.2 interrupt timing t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v note: n = 0 to 8 figure 2-9: interrupt timing remark: n = 0 to 8 table 2-12: key return timing parameter symbol test conditions min. max. unit krn input low level width note t wkrl 500 ns table 2-13: interrupt timing parameter symbol test conditions min. max. unit nmi high-level width t wnih analog filter 500 ns nmi low-level width t wnil analog filter 500 ns intpn note high-level width t with analog filter 500 ns intpn note low-level width t witl analog filter 500 ns t wkrl krn t wnih t wnil nmi t with t witl intpn
30 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 2.5.3 timer g0 / timer c0 /timer 5n t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v notes: 1. m = 0 to 5 2. t t : depends on selected clock source for the peripheral clock supply and the setup of the respective timer macro clock and timer channel setup 3. m = 0 to 1 4. n = 0 to 2 figure 2-10: timer g0 characteristics figure 2-11: timer c0 characteristics figure 2-12: timer 5n characteristics table 2-14: timer g0 / timer c0 / timer 5n characteristics parameter symbol test conditions min. max. unit tig0m high-level width note 1 t wtigh t t x 2 + 20 note 2 ns tig0m low-level width note 1 t wtigl t t x 2 + 20 note 2 ns tic0m high-level width note 3 t wtich t t x 2 + 20 note 2 ns tic0m low-level width note 3 t wticl t t x 2 + 20 note 2 ns ti5n input cycle time note 4 t wti5cy 120 ns ti5n input high level with note 4 t wti5ch 48 ns ti5n low level width note 4 t wti5cl 48 ns t wtigh t wtigl tig0n t wtich t wticl tic01 t wti5ch t wti5cl tic5n t wti5cy
31 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 2.5.4 csi t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 remark: n = 0, 1 remark: n = 0, 1 table 2-15: csi master mode characteristics parameter note symbol test conditions min. max. unit sck0n cycle time t cyskm output 200 ns sck0n high level width t wskhm output 0.5 t cysk - 10 ns sck0n low level width t wsklm output 0.5 t cysk - 10 ns si0n set up time (to sck0n n ) t ssiskm 30 ns si0n hold time (from sck0n n ) t hsksim 30 ns so0n output delay time (from sck0n p ) t dsksom 30 ns so0n output hold time (from sck0n n ) t hsksom 0.5 t cysk - 5 ns table 2-16: csi slave mode characteristics parameter note symbol test conditions min. max. unit sck0n cycle time t cysks input 200 ns sck0n high level width t wskhs input 0.5 t cysk -10 ns sck0n low level width t wskls input 0.5 t cysk -10 ns si0n set up time (to sck0n n ) t ssisks 50 ns si0n hold time (from sck0n n ) t hsksis 50 ns so0n output delay time (from sck0n p ) t dsksos 50 ns so0n output hold time (from sck0n n ) t hsksos 0.5 t cysk - 5 ns
32 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 figure 2-13: csi slave mode characteristics 2.5.5 uart t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v 2.5.6 dcan t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v table 2-17: uart characteristics parameter symbol test conditions min. max. unit transfer rate t uart f peripheral t 5 mhz 312500 bps table 2-18: dcan characteristics parameter symbol test conditions min. max. unit transfer rate t dcan f xx = 16 mhz 1mbps t wskl t wskh t cysk input data t ssisk t hsksi hi-z output data t dskso t hskso sck0n si0n so0n
33 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 2.5.7 a/d converter t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.5 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v notes: 1. the quantization error is not included 2. the conversion time t conv depends on the setting of the adm register 3. the sampling time t sam depends on the setting of the adm register 4. the leakage current specification becomes valid if the a/d converter reference voltage is switched off. 2.5.8 voltage regulator t a = -40c to +85c, v dd50 = v dd51 = av dd = 4.0 v ~ 5.5 v, v ss51 = v ss30 = v ss31 = av ss = 0 v note: c regc0 & c regc1 are respectively connected to regc0 and regc1 pins. they must have the same value. remark: to improve emi and noise filtering, it might be necessary to connect small size capaci- tances in parallel with c regc0 & c regc1 . table 2-19: a/d converter characteristics parameter symbol test conditions min. typ. max. unit resolution - 10 bit overall error note 1 - r 3lsb conversion time note 2 t conv 512s sampling time note 3 t sam t conv /6 s analog input voltage v ian av ss av dd v analog supply current i avdd a/d converter is operating 4.0 8.0 ma i lavdd a/d converter is stopped note 4 1.0 5.0 a table 2-20: voltage regulator parameter symbol test co nditions min. max. unit output voltage stabilization time t reg time starts when v dd50 reaches minimum value of 4.0 v (c regc0 = c regc1 = 1 f) note 2ms
34 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 3. package drawing figure 3-1: package drawing 100-pin plastic lqfp (fine pitch) (14x14) note each lead centerline is located within 0.08 mm of its true position (t.p.) at maximum material condition. item millimeters a b d g 16.00 + ? + ? + ?
35 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 4. recommended soldering conditions solder this product under the following recommended conditions. for details of the recommended soldering conditions, refer to information document semiconductor device: mounting technology manual (c10535e). for soldering methods and conditions other than those recommended please consult nec. note: the number of days refers to storage at 25c, 65% rh max after the dry pack has been opened. after that, prebaking is necessary at 125 c for 10 to 72 hours. caution: do not use two or more soldering methods in combination (except partial heating method). table 4-1: soldering conditions soldering method soldering condition symbol of recommended soldering condition infrared reflow package peak temperature: 235c, time: 30 seconds max. (210c min.), number of times: 3 max., number of days: 7 note ir35-107-3 vps package peak temperature: 215c, time: 30 seconds max. (210c min.), number of times: 2 max., number of days: 7 note vp15-207-2 partial heating pin temperature: 300c max., time: 3 seconds max. ( per side of device) -
36 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 all other product, brand, or trade names used in this publication are the trademarks or registered trademarks of their respective trademark owners. product specifications are subject to change without notice. to ensure that you have the latest product data, please contact your local nec electronics sales office. notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
37 data sheet u15870ee1v1ds00 pd703223, pd703224, p d703225, pd703226 the information in this document is current as of april, 2005. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec electronics data sheets or data books, etc., for the most up-to-date specifications of nec electronics products. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer- designated "quality assurance program" for a specific application. the recommended applications of an nec electronics product depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) ? ? ? ? ? ?
38 data sheet u15870ee1v1ds00 pd703223, pd703224, pd703225, pd703226 regional information some information contained in this document may vary from country to country. before using any nec product in your application, please contact the nec office in your country to obtain a list of authorized representatives and distributors. they will verify: device availability ordering information product release schedule availability of related technical literature development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, ac supply voltages, and so forth) network requirements in addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country. nec electronics america inc. santa clara, california t el: 408-588-6000 800-366-9782 fax: 408-588-6130 800-729-9288 nec electronics (europe) gmbh duesseldorf, germany t el: 0211-65 03 1101 fax: 0211-65 03 1327 sucursal en espa?a madrid, spain tel: 091- 504 27 87 fax: 091- 504 28 60 succursale fran?aise vlizy-villacoublay, france tel: 01-30-67 58 00 fax: 01-30-67 58 99 nec electronics hong kong ltd. hong kong tel: 2886-9318 fax: 2886-9022/9044 nec electronics hong kong ltd. seoul branch seoul, korea tel: 02-528-0303 fax: 02-528-4411 nec electronics singapore pte. ltd. singapore tel: 65-6253-8311 fax: 65-6250-3583 nec electronics taiwan ltd. taipei, taiwan tel: 02-2719-2377 fax: 02-2719-5951 filiale italiana milano, italy tel: 02-66 75 41 fax: 02-66 75 42 99 branch the netherlands eindhoven, the netherlands tel: 040-244 58 45 fax: 040-244 45 80 branch sweden taeby, sweden tel: 08-63 80 820 fax: 08-63 80 388 united kingdom branch milton keynes, uk tel: 01908-691-133 fax: 01908-670-290
although nec has taken all possible steps to ensure that the documentation supplied to our customers is complete, bug free and up-to-date, we readily accept that errors may occur. despite all the care and precautions we've taken, you may encounter problems in the documentation. please complete this form whenever you'd like to report errors or suggest improvements to us. hong kong, philippines, oceania nec electronics hong kong ltd. fax: +852-2886-9022/9044 korea nec electronics hong kong ltd. seoul branch fax: 02-528-4411 taiwan nec electronics taiwan ltd. fax: 02-2719-5951 address north america nec electronics america inc. corporate communications dept. fax: 1-800-729-9288 1-408-588-6130 europe nec electronics (europe) gmbh market communication dept. fax: +49(0)-211-6503-1344 asian nations except philippines nec electronics singapore pte. ltd. fax: +65-6250-3583 japan nec semiconductor technical hotline i would like to report the following error/make the following suggestion: document title: document number: page number: thank you for your kind support. if possible, please fax the referenced page or drawing. excellent good acceptable poor document rating clarity technical accuracy organization cs 99.1 name company from: tel. fax facsimile message fax: +81- 44-435-9608

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